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authorRich Felker <dalias@libc.org>2016-04-07 15:01:53 +0000
committerRich Felker <dalias@libc.org>2016-04-28 20:48:17 +0000
commit3784a31c12dc9c23c5c497786f503e1acafe64dd (patch)
tree3d2241b76fcb6d819e10bf82371f75d8260a3afd
parent336f96998312319f17ea4b6c3e60a1ccd587cdd7 (diff)
downloadlinux-sh-j2-stable.tar.gz
sh: add device tree source for J2 FPGA on Mimas v2 boardj2-stable
Signed-off-by: Rich Felker <dalias@libc.org>
-rwxr-xr-xarch/sh/boot/dts/j2_mimas_v2.dts98
1 files changed, 98 insertions, 0 deletions
diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts
new file mode 100755
index 000000000000..0d509f9dc9e2
--- /dev/null
+++ b/arch/sh/boot/dts/j2_mimas_v2.dts
@@ -0,0 +1,98 @@
+/dts-v1/;
+
+/ {
+ compatible = "jcore,j2-soc";
+ model = "J2 FPGA SoC on Mimas v2 board";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&aic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "jcore,j2";
+ reg = < 0 >;
+ clock-frequency = < 50000000 >;
+ };
+ };
+
+ memory@10000000 {
+ device_type = "memory";
+ reg = < 0x10000000 0x4000000 >;
+ };
+
+ chosen {
+ stdout-path = "/soc@abcd0000/serial@100";
+ };
+
+ soc@abcd0000 {
+ compatible = "simple-bus";
+ ranges = <0 0xabcd0000 0x100000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aic: interrupt-controller {
+ compatible = "jcore,aic1";
+ reg = < 0x200 0x10 >;
+ cpu-offset = < 0x300 >;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ cache-controller {
+ compatible = "jcore,cache";
+ reg = < 0xc0 4 >;
+ cpu-offset = < 4 >;
+ };
+
+ timer {
+ compatible = "jcore,pit";
+ reg = < 0x200 0x30 >;
+ cpu-offset = < 0x300 >;
+ interrupts = < 0x48 >;
+ };
+
+ ethernet {
+ compatible = "jcore,emac";
+ reg = < 0x10000 0x2000 >;
+ //interrupts = < 0x60 >;
+ interrupts = < 0x11 >;
+ };
+
+ spi {
+ compatible = "jcore,spi2";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ spi-max-frequency = <12500000>;
+
+ reg = < 0x40 0x8 >;
+
+ sdcard@1 {
+ compatible = "mmc-spi-slot";
+ reg = <0>;
+ spi-max-frequency = <12500000>;
+ voltage-ranges = <3200 3400>;
+ mode = <0>;
+ };
+ };
+
+ serial@100 {
+ clock-frequency = <125000000>;
+ compatible = "jcore,uartlite", "xlnx,xps-uartlite-1.00.a";
+ current-speed = <115200>;
+ device_type = "serial";
+ //interrupts = < 0x5d >;
+ interrupts = < 0x12 >;
+ port-number = <0>;
+ reg = < 0x100 0x10 >;
+ };
+ };
+};