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authorHeiko Stuebner <heiko@sntech.de>2016-03-24 22:29:03 +0100
committerKishon Vijay Abraham I <kishon@ti.com>2016-04-13 18:33:05 +0530
commit5128de85124c728cdbb6b35bd9dc7410f02c0ca1 (patch)
treee123ae599fe5953242411a9e4b5ed1acf53b3dc1
parent332184adff50de9596f03735496c545e8bccc73e (diff)
downloadlinux-sh-5128de85124c728cdbb6b35bd9dc7410f02c0ca1.tar.gz
phy: rockchip-emmc: adapt binding to specifiy register offset and length
The emmc-phy occupies a contiguous set of 8 registers inside the general register files, so the reg property should specify this. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-rw-r--r--Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt6
1 files changed, 4 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
index 461e9580aa45..555cb0f40690 100644
--- a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
+++ b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
@@ -4,7 +4,7 @@ Rockchip EMMC PHY
Required properties:
- compatible: rockchip,rk3399-emmc-phy
- #phy-cells: must be 0
- - reg: PHY configure reg address offset in "general
+ - reg: PHY register address offset and length in "general
register files"
Example:
@@ -12,12 +12,14 @@ Example:
grf: syscon@ff770000 {
compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
...
emmcphy: phy@f780 {
compatible = "rockchip,rk3399-emmc-phy";
- reg = <0xf780>;
+ reg = <0xf780 0x20>;
#phy-cells = <0>;
};
};