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authorRich Felker <dalias@libc.org>2016-04-22 23:29:13 +0000
committerRich Felker <dalias@libc.org>2016-04-28 20:48:09 +0000
commitf6b971971962df746873e8f031204b042ae03e14 (patch)
tree63abac3798af6588b0c01b062b9d24502708d873
parentb8864269082ee9e5dcc079865340de70711b3272 (diff)
downloadlinux-sh-f6b971971962df746873e8f031204b042ae03e14.tar.gz
sh: add AT_HWCAP flag for J-Core cas.l instruction
Signed-off-by: Rich Felker <dalias@libc.org>
-rw-r--r--arch/sh/include/uapi/asm/cpu-features.h1
-rw-r--r--arch/sh/kernel/cpu/sh2/probe.c2
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/sh/include/uapi/asm/cpu-features.h b/arch/sh/include/uapi/asm/cpu-features.h
index 694abe490edb..2f1bc851042a 100644
--- a/arch/sh/include/uapi/asm/cpu-features.h
+++ b/arch/sh/include/uapi/asm/cpu-features.h
@@ -22,5 +22,6 @@
#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */
#define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */
#define CPU_HAS_PTEAEX 0x0200 /* PTE ASID Extension support */
+#define CPU_HAS_CAS_L 0x0400 /* cas.l atomic compare-and-swap */
#endif /* __ASM_SH_CPU_FEATURES_H */
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index d8dbb818704a..ecf836019e7e 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -33,6 +33,8 @@ void cpu_probe(void)
boot_cpu_data.dcache.entry_shift = 5;
boot_cpu_data.dcache.linesz = 32;
boot_cpu_data.dcache.flags = 0;
+
+ boot_cpu_data.flags |= CPU_HAS_CAS_L;
#else
/*
* SH-2 doesn't have separate caches