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authorRich Felker <dalias@libc.org>2016-08-10 15:38:47 +0000
committerRich Felker <dalias@libc.org>2016-08-10 15:38:47 +0000
commite1877a80ca92426142609468750efc39b6d60333 (patch)
treeb91a61dc9715ec541be32c58f6d2c6aa2e4b23b9
parent425d3132a597f635e208769f0134f0d0625a4974 (diff)
downloadlinux-sh-e1877a80ca92426142609468750efc39b6d60333.tar.gz
timer/jcore: backport changes sent upstream for 4.8
Signed-off-by: Rich Felker <dalias@libc.org>
-rw-r--r--drivers/clocksource/jcore-pit.c245
1 files changed, 108 insertions, 137 deletions
diff --git a/drivers/clocksource/jcore-pit.c b/drivers/clocksource/jcore-pit.c
index f3637b342aec..8e7ab3e8c0e1 100644
--- a/drivers/clocksource/jcore-pit.c
+++ b/drivers/clocksource/jcore-pit.c
@@ -15,67 +15,55 @@
#include <linux/clocksource.h>
#include <linux/sched_clock.h>
#include <linux/cpu.h>
+#include <linux/cpuhotplug.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
-#define PIT_IRQ_SHIFT 12
-#define PIT_PRIO_SHIFT 20
-#define PIT_ENABLE_SHIFT 26
-#define PIT_IRQ_MASK 0x3f
-#define PIT_PRIO_MASK 0xf
-
-#define REG_PITEN 0x00
-#define REG_THROT 0x10
-#define REG_COUNT 0x14
-#define REG_BUSPD 0x18
-#define REG_SECHI 0x20
-#define REG_SECLO 0x24
-#define REG_NSEC 0x28
-
-struct jcore_clocksource {
- struct clocksource cs;
- __iomem void *base;
-};
+#define PIT_IRQ_SHIFT 12
+#define PIT_PRIO_SHIFT 20
+#define PIT_ENABLE_SHIFT 26
+#define PIT_IRQ_MASK 0x3f
+#define PIT_PRIO_MASK 0xf
-struct jcore_pit {
- struct clock_event_device ced;
- __iomem void *base;
- unsigned long periodic_delta;
- unsigned cpu;
- phys_addr_t paddr;
- resource_size_t psize;
- u32 enable_val;
-};
+#define REG_PITEN 0x00
+#define REG_THROT 0x10
+#define REG_COUNT 0x14
+#define REG_BUSPD 0x18
+#define REG_SECHI 0x20
+#define REG_SECLO 0x24
+#define REG_NSEC 0x28
-struct jcore_pit_nb {
- struct notifier_block nb;
- struct jcore_pit __percpu *pit_percpu;
+struct jcore_pit {
+ struct clock_event_device ced;
+ __iomem void *base;
+ unsigned long periodic_delta;
+ unsigned cpu;
+ u32 enable_val;
};
-static struct clocksource *jcore_cs;
+static __iomem void *jcore_pit_base;
+static struct clocksource jcore_cs;
+struct jcore_pit __percpu *jcore_pit_percpu;
+struct notifier_block jcore_pit_nb;
-static cycle_t jcore_clocksource_read(struct clocksource *cs)
+static notrace u64 jcore_sched_clock_read(void)
{
- __iomem void *base =
- container_of(cs, struct jcore_clocksource, cs)->base;
- u32 sechi, seclo, nsec, sechi0, seclo0;
+ u32 seclo, nsec, seclo0;
+ __iomem void *base = jcore_pit_base;
- sechi = __raw_readl(base + REG_SECHI);
seclo = __raw_readl(base + REG_SECLO);
do {
- sechi0 = sechi;
seclo0 = seclo;
nsec = __raw_readl(base + REG_NSEC);
- sechi = __raw_readl(base + REG_SECHI);
seclo = __raw_readl(base + REG_SECLO);
- } while (sechi0 != sechi || seclo0 != seclo);
+ } while (seclo0 != seclo);
- return ((u64)sechi << 32 | seclo) * NSEC_PER_SEC + nsec;
+ return seclo * NSEC_PER_SEC + nsec;
}
-static notrace u64 jcore_sched_clock_read(void)
+static cycle_t jcore_clocksource_read(struct clocksource *cs)
{
- return jcore_clocksource_read(jcore_cs);
+ return jcore_sched_clock_read();
}
static int jcore_pit_disable(struct jcore_pit *pit)
@@ -95,18 +83,21 @@ static int jcore_pit_set(unsigned long delta, struct jcore_pit *pit)
static int jcore_pit_set_state_shutdown(struct clock_event_device *ced)
{
struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced);
+
return jcore_pit_disable(pit);
}
static int jcore_pit_set_state_oneshot(struct clock_event_device *ced)
{
struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced);
+
return jcore_pit_disable(pit);
}
static int jcore_pit_set_state_periodic(struct clock_event_device *ced)
{
struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced);
+
return jcore_pit_set(pit->periodic_delta, pit);
}
@@ -114,42 +105,43 @@ static int jcore_pit_set_next_event(unsigned long delta,
struct clock_event_device *ced)
{
struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced);
+
return jcore_pit_set(delta, pit);
}
-static int jcore_pit_local_init(struct jcore_pit *pit)
+static int jcore_pit_local_init(unsigned cpu)
{
- unsigned buspd;
+ struct jcore_pit *pit = this_cpu_ptr(jcore_pit_percpu);
+ unsigned buspd, freq;
pr_info("Local J-Core PIT init on cpu %u\n", pit->cpu);
- pit->base = ioremap(pit->paddr, pit->psize);
- if (!pit->base)
- return -ENOMEM;
-
buspd = __raw_readl(pit->base + REG_BUSPD);
+ freq = DIV_ROUND_CLOSEST(NSEC_PER_SEC, buspd);
pit->periodic_delta = DIV_ROUND_CLOSEST(NSEC_PER_SEC, HZ*buspd);
- clockevents_config_and_register(&pit->ced,
- DIV_ROUND_CLOSEST(NSEC_PER_SEC, buspd),
- 1, 0xffffffff);
+ clockevents_config_and_register(&pit->ced, freq, 1, ULONG_MAX);
+
+ return 0;
+}
+static int jcore_pit_local_shutdown(unsigned cpu)
+{
return 0;
}
static int jcore_pit_cpu_notify(struct notifier_block *self,
unsigned long action, void *hcpu)
{
- struct jcore_pit_nb *nb = container_of(self, struct jcore_pit_nb, nb);
switch (action & ~CPU_TASKS_FROZEN) {
case CPU_STARTING:
- jcore_pit_local_init(this_cpu_ptr(nb->pit_percpu));
+ jcore_pit_local_init(smp_processor_id());
break;
}
return NOTIFY_OK;
}
-static irqreturn_t timer_interrupt(int irq, void *dev_id)
+static irqreturn_t jcore_timer_interrupt(int irq, void *dev_id)
{
struct jcore_pit *pit = this_cpu_ptr(dev_id);
@@ -161,133 +153,112 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static void __init jcore_pit_init(struct device_node *node)
+static int __init jcore_pit_init(struct device_node *node)
{
int err;
- __iomem void *pit_base;
- unsigned pit_irq;
- u32 percpu_offset = 0;
- unsigned cpu;
- struct resource res;
- struct jcore_pit_nb *nb = 0;
- struct jcore_clocksource *cs = 0;
- struct jcore_pit __percpu *pit_percpu = 0;
+ unsigned pit_irq, cpu;
unsigned long hwirq;
u32 irqprio, enable_val;
- pit_base = of_iomap(node, 0);
- if (!pit_base) {
+ jcore_pit_base = of_iomap(node, 0);
+ if (!jcore_pit_base) {
pr_err("Error: Cannot map base address for J-Core PIT\n");
- goto out;
+ return -ENXIO;
}
pit_irq = irq_of_parse_and_map(node, 0);
if (!pit_irq) {
pr_err("Error: J-Core PIT has no IRQ\n");
- goto out;
+ return -ENXIO;
}
- of_address_to_resource(node, 0, &res);
- of_property_read_u32(node, "cpu-offset", &percpu_offset);
+ pr_info("Initializing J-Core PIT at %p IRQ %d\n",
+ jcore_pit_base, pit_irq);
- pr_info("Initializing J-Core PIT at %p IRQ %d\n", pit_base, pit_irq);
+ jcore_cs.name = "jcore_pit_cs";
+ jcore_cs.rating = 400;
+ jcore_cs.read = jcore_clocksource_read;
+ jcore_cs.mult = 1;
+ jcore_cs.shift = 0;
+ jcore_cs.mask = CLOCKSOURCE_MASK(32);
+ jcore_cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
- cs = kzalloc(sizeof *cs, GFP_KERNEL);
- if (!cs) {
- pr_err("Failed to allocate memory for clocksource\n");
- goto out;
- }
- jcore_cs = &cs->cs;
-
- cs->base = pit_base;
- cs->cs.name = "jcore_pit_cs";
- cs->cs.rating = 400;
- cs->cs.read = jcore_clocksource_read;
- cs->cs.mult = 1;
- cs->cs.shift = 0;
- cs->cs.mask = CLOCKSOURCE_MASK(64);
- cs->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
-
- err = clocksource_register_hz(&cs->cs, NSEC_PER_SEC);
+ err = clocksource_register_hz(&jcore_cs, NSEC_PER_SEC);
if (err) {
pr_err("Error registering clocksource device: %d\n", err);
- goto out;
+ return err;
}
- sched_clock_register(jcore_sched_clock_read, 64, NSEC_PER_SEC);
+ sched_clock_register(jcore_sched_clock_read, 32, NSEC_PER_SEC);
- pit_percpu = alloc_percpu(struct jcore_pit);
- if (!pit_percpu) {
+ jcore_pit_percpu = alloc_percpu(struct jcore_pit);
+ if (!jcore_pit_percpu) {
pr_err("Failed to allocate memory for clock event device\n");
- goto out;
- }
-
- for_each_possible_cpu(cpu) {
- struct jcore_pit *pit = per_cpu_ptr(pit_percpu, cpu);
-
- pit->ced.name = "jcore_pit";
- pit->ced.features = CLOCK_EVT_FEAT_PERIODIC
- | CLOCK_EVT_FEAT_ONESHOT
- | CLOCK_EVT_FEAT_PERCPU;
- pit->ced.cpumask = cpumask_of(cpu);
- pit->ced.rating = 400;
- pit->ced.irq = pit_irq;
- pit->ced.set_state_shutdown = jcore_pit_set_state_shutdown;
- pit->ced.set_state_periodic = jcore_pit_set_state_periodic;
- pit->ced.set_state_oneshot = jcore_pit_set_state_oneshot;
- pit->ced.set_next_event = jcore_pit_set_next_event;
-
- pit->paddr = res.start;
- pit->psize = resource_size(&res);
- res.start += percpu_offset;
-
- pit->cpu = cpu;
- }
-
- nb = kzalloc(sizeof *nb, GFP_KERNEL);
- if (!nb) {
- pr_err("Failed to allocate memory for J-Core PIT notifier\n");
- goto out;
+ return -ENOMEM;
}
- nb->pit_percpu = pit_percpu;
- nb->nb.notifier_call = jcore_pit_cpu_notify;
- err = register_cpu_notifier(&nb->nb);
+ jcore_pit_nb.notifier_call = jcore_pit_cpu_notify;
+ err = register_cpu_notifier(&jcore_pit_nb);
if (err) {
pr_err("Error registering J-Core PIT notifier: %d\n", err);
- goto out;
- }
+ return -ENOMEM;
+ }
- err = request_irq(pit_irq, timer_interrupt,
- IRQF_TIMER | IRQF_PERCPU, "jcore_pit", pit_percpu);
+ err = request_irq(pit_irq, jcore_timer_interrupt,
+ IRQF_TIMER | IRQF_PERCPU,
+ "jcore_pit", jcore_pit_percpu);
if (err) {
pr_err("pit irq request failed: %d\n", err);
- goto out;
+ return err;
}
- /* The J-Core PIT is not hard-wired to a particular IRQ, but
+ /*
+ * The J-Core PIT is not hard-wired to a particular IRQ, but
* integrated with the interrupt controller such that the IRQ it
* generates is programmable. The programming interface has a
* legacy field which was an interrupt priority for AIC1, but
* which is OR'd onto bits 2-5 of the generated IRQ number when
- * used with J-Core AIC2, so set it to match these bits. */
+ * used with J-Core AIC2, so set it to match these bits.
+ */
hwirq = irq_get_irq_data(pit_irq)->hwirq;
irqprio = (hwirq >> 2) & PIT_PRIO_MASK;
enable_val = (1U << PIT_ENABLE_SHIFT)
| (hwirq << PIT_IRQ_SHIFT)
| (irqprio << PIT_PRIO_SHIFT);
- for_each_possible_cpu(cpu) {
- struct jcore_pit *pit = per_cpu_ptr(pit_percpu, cpu);
+ for_each_present_cpu(cpu) {
+ struct jcore_pit *pit = per_cpu_ptr(jcore_pit_percpu, cpu);
+
+ pit->base = of_iomap(node, cpu);
+ if (!pit->base) {
+ pr_err("Unable to map PIT for cpu %u\n", cpu);
+ continue;
+ }
+
+ pit->ced.name = "jcore_pit";
+ pit->ced.features = CLOCK_EVT_FEAT_PERIODIC
+ | CLOCK_EVT_FEAT_ONESHOT
+ | CLOCK_EVT_FEAT_PERCPU;
+ pit->ced.cpumask = cpumask_of(cpu);
+ pit->ced.rating = 400;
+ pit->ced.irq = pit_irq;
+ pit->ced.set_state_shutdown = jcore_pit_set_state_shutdown;
+ pit->ced.set_state_periodic = jcore_pit_set_state_periodic;
+ pit->ced.set_state_oneshot = jcore_pit_set_state_oneshot;
+ pit->ced.set_next_event = jcore_pit_set_next_event;
+
+ pit->cpu = cpu;
pit->enable_val = enable_val;
}
- jcore_pit_local_init(this_cpu_ptr(pit_percpu));
+ jcore_pit_local_init(smp_processor_id());
- return;
+ return 0;
+}
-out:
- pr_err("Could not initialize J-Core PIT driver\n");
+static void __init jcore_pit_init_wrap(struct device_node *node)
+{
+ jcore_pit_init(node);
}
-CLOCKSOURCE_OF_DECLARE(jcore_pit, "jcore,pit", jcore_pit_init);
+CLOCKSOURCE_OF_DECLARE(jcore_pit, "jcore,pit", jcore_pit_init_wrap);