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authorRich Felker <dalias@libc.org>2016-04-22 23:29:13 +0000
committerRich Felker <dalias@libc.org>2016-06-08 21:54:31 +0000
commitf3f7171c829eadc4584494d8033f0322ed0a0968 (patch)
treec279dab3620cf9763cd546e863e328fd6efcff8d
parenta4c36acd2a3d31966022d70413851b80542f1da3 (diff)
downloadlinux-sh-f3f7171c829eadc4584494d8033f0322ed0a0968.tar.gz
sh: add AT_HWCAP flag for J-Core cas.l instruction
Signed-off-by: Rich Felker <dalias@libc.org>
-rw-r--r--arch/sh/include/uapi/asm/cpu-features.h1
-rw-r--r--arch/sh/kernel/cpu/sh2/probe.c2
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/sh/include/uapi/asm/cpu-features.h b/arch/sh/include/uapi/asm/cpu-features.h
index 694abe490edb..2f1bc851042a 100644
--- a/arch/sh/include/uapi/asm/cpu-features.h
+++ b/arch/sh/include/uapi/asm/cpu-features.h
@@ -22,5 +22,6 @@
#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */
#define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */
#define CPU_HAS_PTEAEX 0x0200 /* PTE ASID Extension support */
+#define CPU_HAS_CAS_L 0x0400 /* cas.l atomic compare-and-swap */
#endif /* __ASM_SH_CPU_FEATURES_H */
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index 3dd81870adba..665fcfbade0d 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -54,6 +54,8 @@ void __ref cpu_probe(void)
boot_cpu_data.dcache.entry_shift = 5;
boot_cpu_data.dcache.linesz = 32;
boot_cpu_data.dcache.flags = 0;
+
+ boot_cpu_data.flags |= CPU_HAS_CAS_L;
#else
/*
* SH-2 doesn't have separate caches