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authorRich Felker <dalias@libc.org>2016-05-17 23:19:25 +0000
committerRich Felker <dalias@libc.org>2016-10-18 18:55:08 -0400
commitdf0bc875834dc62b58fddcb9951056ebfcdcf78d (patch)
tree09c3b4de63089317d19bf67de8ca56b5e024fc99
parentaf0c083e3fa1c3c426d2c5dd7b4cdc950900a1f0 (diff)
downloadlinux-sh-df0bc875834dc62b58fddcb9951056ebfcdcf78d.tar.gz
of: add J-Core SPI master bindings
Signed-off-by: Rich Felker <dalias@libc.org>
-rw-r--r--Documentation/devicetree/bindings/spi/jcore,spi.txt34
1 files changed, 34 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/jcore,spi.txt b/Documentation/devicetree/bindings/spi/jcore,spi.txt
new file mode 100644
index 000000000000..93936d16e139
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/jcore,spi.txt
@@ -0,0 +1,34 @@
+J-Core SPI master
+
+Required properties:
+
+- compatible: Must be "jcore,spi2".
+
+- reg: Memory region for registers.
+
+- #address-cells: Must be 1.
+
+- #size-cells: Must be 0.
+
+Optional properties:
+
+- clocks: If a phandle named "ref_clk" is present, SPI clock speed
+ programming is relative to the frequency of the indicated clock.
+ Necessary only if the input clock rate is something other than a
+ fixed 50 MHz.
+
+- clock-names: Clock names, one for each phandle in clocks.
+
+See spi-bus.txt for additional properties not specific to this device.
+
+Example:
+
+spi@40 {
+ compatible = "jcore,spi2";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x40 0x8>;
+ spi-max-frequency = <25000000>;
+ clocks = <&bus_clk>;
+ clock-names = "ref_clk";
+}