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/dts-v1/;
/ {
compatible = "jcore,j2-soc";
model = "J2 FPGA SoC on Mimas v2 board";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&aic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
enable-method = "jcore,j2-soc-smp";
cpu@0 {
device_type = "cpu";
compatible = "jcore,j2";
reg = < 0 >;
clock-frequency = < 50000000 >;
};
};
memory@10000000 {
device_type = "memory";
reg = < 0x10000000 0x4000000 >;
};
chosen {
stdout-path = "/soc@abcd0000/serial@100";
};
soc@abcd0000 {
compatible = "simple-bus";
ranges = <0 0xabcd0000 0x100000>;
#address-cells = <1>;
#size-cells = <1>;
aic: interrupt-controller {
compatible = "jcore,soc-aic-0.2";
reg = < 0x200 0x10 >;
cpu-offset = < 0x300 >;
interrupt-controller;
#interrupt-cells = <1>;
};
cache-controller {
compatible = "jcore,soc-cache-0.1";
reg = < 0xc0 4 >;
cpu-offset = < 4 >;
};
timer {
compatible = "jcore,soc-pit-0.1";
reg = < 0x200 0x30 >;
cpu-offset = < 0x300 >;
//interrupts = < 0x48 >;
interrupts = < 0x7f >;
};
ethernet {
compatible = "jcore,soc-emac-0.1";
reg = < 0x10000 0x2000 >;
//interrupts = < 0x60 >;
interrupts = < 0x11 >;
};
spi {
compatible = "jcore,soc-spi-0.1";
#address-cells = <1>;
#size-cells = <0>;
status = "ok";
//status = "disabled";
spi-max-frequency = <1250000>;
reg = < 0x40 0x8 >;
sdcard@1 {
compatible = "mmc-spi-slot";
reg = <0>;
spi-max-frequency = <400000>;
voltage-ranges = <3200 3400>;
mode = <0>;
};
};
serial@100 {
clock-frequency = <125000000>;
compatible = "xlnx,xps-uartlite-1.00.a";
current-speed = <115200>;
device_type = "serial";
//interrupts = < 0x5d >;
interrupts = < 0x12 >;
port-number = <0>;
reg = < 0x100 0x10 >;
};
};
};
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