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authorRich Felker <dalias@aerifal.cx>2019-05-22 18:28:32 -0400
committerRich Felker <dalias@aerifal.cx>2019-05-22 23:27:48 -0400
commitac304227bb3ea1787d581f17d76a5f5f3abff51f (patch)
tree4acca016f9d9bbf3a73d5e3257a288f997b6f874
parent3c59a868956636bc8adafb1b168d090897692532 (diff)
downloadmusl-ac304227bb3ea1787d581f17d76a5f5f3abff51f.tar.gz
make powerpc64 vrregset_t logical layout match expected API
between v2 and v3 of the powerpc64 port patch, the change was made from a 32x4 array of 32-bit unsigned ints for vrregs[] to a 32-element array of __int128. this mismatches the API applications working with mcontext_t expect from glibc, and seems to have been motivated by a misinterpretation of a comment on how aarch64 did things as a suggestion to do the same on powerpc64.
-rw-r--r--arch/powerpc64/bits/signal.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/powerpc64/bits/signal.h b/arch/powerpc64/bits/signal.h
index 94c7a327..2cc0604c 100644
--- a/arch/powerpc64/bits/signal.h
+++ b/arch/powerpc64/bits/signal.h
@@ -16,7 +16,10 @@ typedef struct {
} fpregset_t;
typedef struct {
- unsigned __int128 vrregs[32];
+#ifdef __GNUC__
+ __attribute__((__aligned__(16)))
+#endif
+ unsigned vrregs[32][4];
struct {
#if __BIG_ENDIAN__
unsigned _pad[3], vscr_word;