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| author | Rich Felker <dalias@aerifal.cx> | 2014-07-19 15:51:12 -0400 |
|---|---|---|
| committer | Rich Felker <dalias@aerifal.cx> | 2014-07-28 00:28:00 -0400 |
| commit | e30a16314d08667aa3302e2df5baaa23b80a3aa2 (patch) | |
| tree | 019e8f79283d3ee8c142316e2c4cb6526bc68de1 /src/process/waitid.c | |
| parent | 806655b22539416290aeff36c4be588ce3c0e9a1 (diff) | |
| download | musl-e30a16314d08667aa3302e2df5baaa23b80a3aa2.tar.gz | |
fix missing barrier instructions in mips atomic asm
previously I had wrongly assumed the ll/sc instructions also provided
memory synchronization; apparently they do not. this commit adds sync
instructions before and after each atomic operation and changes the
atomic store to simply use sync before and after a plain store, rather
than a useless compare-and-swap.
(cherry picked from commit bcad48439494820989f5867c3f8ccfa6aae2909f)
Diffstat (limited to 'src/process/waitid.c')
0 files changed, 0 insertions, 0 deletions