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authorRich Felker <dalias@libc.org>2016-04-22 23:29:13 +0000
committerRich Felker <dalias@libc.org>2016-07-22 17:03:35 +0000
commit4ef69da7e1d318a1d6780ea8f3681f2291091c25 (patch)
treeac9ad643d0d14ef6a63f616159b0888ae0b28038
parent906f3eaf69e6c25232c0d1ebc87ea9be00f09efe (diff)
downloadlinux-sh-4ef69da7e1d318a1d6780ea8f3681f2291091c25.tar.gz
sh: add AT_HWCAP flag for J-Core cas.l instruction
Signed-off-by: Rich Felker <dalias@libc.org>
-rw-r--r--arch/sh/include/uapi/asm/cpu-features.h1
-rw-r--r--arch/sh/kernel/cpu/sh2/probe.c2
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/sh/include/uapi/asm/cpu-features.h b/arch/sh/include/uapi/asm/cpu-features.h
index 694abe490edb..2f1bc851042a 100644
--- a/arch/sh/include/uapi/asm/cpu-features.h
+++ b/arch/sh/include/uapi/asm/cpu-features.h
@@ -22,5 +22,6 @@
#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */
#define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */
#define CPU_HAS_PTEAEX 0x0200 /* PTE ASID Extension support */
+#define CPU_HAS_CAS_L 0x0400 /* cas.l atomic compare-and-swap */
#endif /* __ASM_SH_CPU_FEATURES_H */
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index 3dd81870adba..665fcfbade0d 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -54,6 +54,8 @@ void __ref cpu_probe(void)
boot_cpu_data.dcache.entry_shift = 5;
boot_cpu_data.dcache.linesz = 32;
boot_cpu_data.dcache.flags = 0;
+
+ boot_cpu_data.flags |= CPU_HAS_CAS_L;
#else
/*
* SH-2 doesn't have separate caches