diff options
authorRich Felker <>2016-10-08 21:11:27 -0400
committerRich Felker <>2016-10-10 12:19:36 -0400
commitdf8b4a500473bab0fc26eb1bef7c4cdb60c145ca (patch)
parent127f81a6268d7ca52ba63732fbf50a2f09a57002 (diff)
irqchip/jcore: fix lost per-cpu interruptsjcore-4.6-20161010
The J-Core AIC does not have separate interrupt numbers reserved for cpu-local vs global interrupts. Instead, the driver requesting the irq is expected to know whether its device uses per-cpu interrupts or not. Previously it was assumed that handle_simple_irq could work for both cases, but it intentionally drops interrupts for an irq number that already has a handler running. This resulted in the timer interrupt for one cpu being lost when multiple cpus' timers were set for approximately the same expiration time, leading to stalls. In theory the same could also happen with IPIs. One possible solution would be to use a wrapper handler function which determines at irq time whether the irq being handled was registered as percpu or not, and dispatches it to either handle_simple_irq or handle_percpu_irq. However handle_simple_irq is unnecessarily expensive for hardware that always delivers interrupts on a fixed cpu, and the runtime branch also has a small but nonzero cost. Instead, use handle_percpu_irq for all irqs. Signed-off-by: Rich Felker <>
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-jcore-aic.c b/drivers/irqchip/irq-jcore-aic.c
index 5e5e3bb7d3c7..055fb6f1625f 100644
--- a/drivers/irqchip/irq-jcore-aic.c
+++ b/drivers/irqchip/irq-jcore-aic.c
@@ -30,7 +30,16 @@ static int jcore_aic_irqdomain_map(struct irq_domain *d, unsigned int irq,
struct irq_chip *aic = d->host_data;
- irq_set_chip_and_handler(irq, aic, handle_simple_irq);
+ /*
+ * For the J-Core AIC1 and AIC2, all irqs behave as percpu. Some
+ * (timer and IPI) can be generated specifically for individual
+ * CPUs; the rest are directly connected to a particular CPU. None
+ * are dynamically routable. Use handle_percpu_irq for all cases,
+ * since it's necessary for the former and safe (and faster) for
+ * the latter, and there's no way to distinguish them with the
+ * information available at mapping time.
+ */
+ irq_set_chip_and_handler(irq, aic, handle_percpu_irq);
return 0;