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authorVineet Gupta <vgupta@synopsys.com>2016-06-21 14:24:33 +0530
committerVineet Gupta <vgupta@synopsys.com>2017-01-24 14:25:19 -0800
commit78f824d4312a8944f5340c6b161bba3bf2c81096 (patch)
tree58b5d951e55645252b251de62a8e449980b40849
parentbf02454a741b58682a82c314a9a46bed930ed2f7 (diff)
downloadlinux-sh-78f824d4312a8944f5340c6b161bba3bf2c81096.tar.gz
ARCv2: smp-boot: wake_flag polling by non-Masters needs to be uncached
This is needed on HS38 cores, for setting up IO-Coherency aperture properly The polling could perturb the caches and coherecy fabric which could be wrong in the small window when Master is setting up IOC aperture etc in arc_cache_init() We do it only for ARCv2 based builds to not affect EZChip ARCompact based platform. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
-rw-r--r--arch/arc/kernel/smp.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c
index 44a0d21ed342..2afbafadb6ab 100644
--- a/arch/arc/kernel/smp.c
+++ b/arch/arc/kernel/smp.c
@@ -90,10 +90,23 @@ void __init smp_cpus_done(unsigned int max_cpus)
*/
static volatile int wake_flag;
+#ifdef CONFIG_ISA_ARCOMPACT
+
+#define __boot_read(f) f
+#define __boot_write(f, v) f = v
+
+#else
+
+#define __boot_read(f) arc_read_uncached_32(&f)
+#define __boot_write(f, v) arc_write_uncached_32(&f, v)
+
+#endif
+
static void arc_default_smp_cpu_kick(int cpu, unsigned long pc)
{
BUG_ON(cpu == 0);
- wake_flag = cpu;
+
+ __boot_write(wake_flag, cpu);
}
void arc_platform_smp_wait_to_boot(int cpu)
@@ -102,10 +115,10 @@ void arc_platform_smp_wait_to_boot(int cpu)
if (IS_ENABLED(CONFIG_ARC_SMP_HALT_ON_RESET))
return;
- while (wake_flag != cpu)
+ while (__boot_read(wake_flag) != cpu)
;
- wake_flag = 0;
+ __boot_write(wake_flag, 0);
}
const char *arc_platform_smp_cpuinfo(void)