summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/dra7.dtsi
diff options
context:
space:
mode:
authorTony Lindgren <tony@atomide.com>2020-04-30 09:52:33 -0700
committerTony Lindgren <tony@atomide.com>2020-05-05 10:19:39 -0700
commit738b150ecefbffb6e55cfa8a3b66a844f777d8fb (patch)
tree2e173d3bd508f7871eb806ce4831583771ceff6f /arch/arm/boot/dts/dra7.dtsi
parent30fa60c678eaa27b8f2a531920d77f7184658f73 (diff)
downloadlinux-sh-738b150ecefbffb6e55cfa8a3b66a844f777d8fb.tar.gz
ARM: dts: omap4-droid4: Fix occasional lost wakeirq for uart1
Looks like using the UART CTS pin does not always trigger for a wake-up when the SoC is idle. This is probably because the modem first uses gpio_149 to signal the SoC that data will be sent, and the CTS will only get used later when the data transfer is starting. Let's fix the issue by configuring the gpio_149 pad as the wakeirq for UART. We have gpio_149 managed by the USB PHY for powering up the right USB mode, and after that, the gpio gets recycled as the modem wake-up pin. If needeed, the USB PHY can also later on be configured to use gpio_149 pad as the wakeirq as a shared irq. Let's also configure the missing properties for uart-has-rtscts and current-speed for the modem port while at it. We already configure the hardware flow control pins with uart1_pins pinctrl setting. Cc: maemo-leste@lists.dyne.org Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Pavel Machek <pavel@ucw.cz> Cc: Sebastian Reichel <sre@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra7.dtsi')
0 files changed, 0 insertions, 0 deletions