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authorMike Frysinger <vapier.adi@gmail.com>2008-08-06 17:17:10 +0800
committerBryan Wu <cooloney@kernel.org>2008-08-06 17:17:10 +0800
commit7e64acabfdb530b1b7d3db2592d75d102827baf3 (patch)
tree9cd5d29f86a700fa474f063462bad928d292b567 /arch/blackfin/mach-bf561/head.S
parent1375204611f417541e55ee09e248acdbbb94356d (diff)
downloadlinux-sh-7e64acabfdb530b1b7d3db2592d75d102827baf3.tar.gz
Blackfin arch: move async memory programming into common setup_arch() as the banks dont really need to be setup fully as early as head.S
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf561/head.S')
-rw-r--r--arch/blackfin/mach-bf561/head.S22
1 files changed, 0 insertions, 22 deletions
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index 553b2d149d71..c541b312c25d 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -161,28 +161,6 @@ ENTRY(__start)
call _start_dma_code;
#endif
- /* Code for initializing Async memory banks */
-
- p2.h = hi(EBIU_AMBCTL1);
- p2.l = lo(EBIU_AMBCTL1);
- r0.h = hi(AMBCTL1VAL);
- r0.l = lo(AMBCTL1VAL);
- [p2] = r0;
- ssync;
-
- p2.h = hi(EBIU_AMBCTL0);
- p2.l = lo(EBIU_AMBCTL0);
- r0.h = hi(AMBCTL0VAL);
- r0.l = lo(AMBCTL0VAL);
- [p2] = r0;
- ssync;
-
- p2.h = hi(EBIU_AMGCTL);
- p2.l = lo(EBIU_AMGCTL);
- r0 = AMGCTLVAL;
- w[p2] = r0;
- ssync;
-
/* This section keeps the processor in supervisor mode
* during kernel boot. Switches to user mode at end of boot.
* See page 3-9 of Hardware Reference manual for documentation.