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authorMike Frysinger <michael.frysinger@analog.com>2007-06-11 15:31:30 +0800
committerBryan Wu <bryan.wu@analog.com>2007-06-11 15:31:30 +0800
commit83a5c3e3218f138b1a99f787c76e380d6a6ecec9 (patch)
treed71fb83fb0406af38d4e3266cb2d54dabb1bb3eb /arch/blackfin/mach-bf561/head.S
parent16983de0cec7b93cc2568f96909d4ea7c118bd8a (diff)
downloadlinux-sh-83a5c3e3218f138b1a99f787c76e380d6a6ecec9.tar.gz
Blackfin arch: unify differences between our diff head.S files -- no functional changes
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/mach-bf561/head.S')
-rw-r--r--arch/blackfin/mach-bf561/head.S20
1 files changed, 11 insertions, 9 deletions
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index ad9187a866a5..3029e940ddcd 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -46,14 +46,16 @@
ENTRY(__start)
ENTRY(__stext)
- /* R0: argument of command line string, passed from uboot, save it */
+ /* R0: argument of command line string, passed from uboot, save it */
R7 = R0;
- /* Set the SYSCFG register */
+ /* Set the SYSCFG register:
+ * Enable Cycle Counter and Nesting Of Interrupts (3rd Bit)
+ */
R0 = 0x36;
- SYSCFG = R0; /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/
+ SYSCFG = R0;
R0 = 0;
- /*Clear Out All the data and pointer Registers*/
+ /* Clear Out All the data and pointer Registers */
R1 = R0;
R2 = R0;
R3 = R0;
@@ -75,7 +77,7 @@ ENTRY(__stext)
L2 = r0;
L3 = r0;
- /* Clear Out All the DAG Registers*/
+ /* Clear Out All the DAG Registers */
B0 = r0;
B1 = r0;
B2 = r0;
@@ -238,7 +240,7 @@ ENTRY(_real_start)
p2.h = ___bss_stop;
r0 = 0;
p2 -= p1;
- lsetup (.L_clear_bss, .L_clear_bss ) lc0 = p2;
+ lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
.L_clear_bss:
B[p1++] = r0;
@@ -253,11 +255,11 @@ ENTRY(_real_start)
r0 = r0 >> 1;
p2 = r0;
r0 = 0;
- lsetup (.L_clear_zero, .L_clear_zero ) lc0 = p2;
+ lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
.L_clear_zero:
W[p1++] = r0;
-/* pass the uboot arguments to the global value command line */
+ /* pass the uboot arguments to the global value command line */
R0 = R7;
call _cmdline_init;
@@ -350,7 +352,7 @@ ENTRY(_start_dma_code)
if ! CC jump .Lcheck_again;
/* Configure SCLK & CCLK Dividers */
- r0 = (CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
+ r0 = (CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
p0.h = hi(PLL_DIV);
p0.l = lo(PLL_DIV);
w[p0] = r0.l;