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authorMike Frysinger <michael.frysinger@analog.com>2007-07-25 10:11:42 +0800
committerBryan Wu <bryan.wu@analog.com>2007-07-25 10:11:42 +0800
commite208f83a7aa4ebf6c0a68e814903e8aa33f9439a (patch)
treea45d34fa199c8e5d75878d8a2f15e944eadce852 /arch/blackfin/mach-bf561/head.S
parent36a1548f99e54520f049a703e1b91bae95e72481 (diff)
downloadlinux-sh-e208f83a7aa4ebf6c0a68e814903e8aa33f9439a.tar.gz
Blackfin arch: use HI/LO macros rather than masking the bit ranges ourselves
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/mach-bf561/head.S')
-rw-r--r--arch/blackfin/mach-bf561/head.S12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index b1d0e54a97a9..173893429b04 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -100,8 +100,8 @@ ENTRY(__start)
R0 = R1;
/* Turn off the icache */
- p0.l = (IMEM_CONTROL & 0xFFFF);
- p0.h = (IMEM_CONTROL >> 16);
+ p0.l = LO(IMEM_CONTROL);
+ p0.h = HI(IMEM_CONTROL);
R1 = [p0];
R0 = ~ENICPLB;
R0 = R0 & R1;
@@ -117,8 +117,8 @@ ENTRY(__start)
#endif
/* Turn off the dcache */
- p0.l = (DMEM_CONTROL & 0xFFFF);
- p0.h = (DMEM_CONTROL >> 16);
+ p0.l = LO(DMEM_CONTROL);
+ p0.h = HI(DMEM_CONTROL);
R1 = [p0];
R0 = ~ENDCPLB;
R0 = R0 & R1;
@@ -371,8 +371,8 @@ ENTRY(_start_dma_code)
w[p0] = r0.l;
ssync;
- p0.l = (EBIU_SDBCTL & 0xFFFF);
- p0.h = (EBIU_SDBCTL >> 16); /* SDRAM Memory Bank Control Register */
+ p0.l = LO(EBIU_SDBCTL);
+ p0.h = HI(EBIU_SDBCTL); /* SDRAM Memory Bank Control Register */
r0 = mem_SDBCTL;
w[p0] = r0.l;
ssync;