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authorGuo Ren <ren_guo@c-sky.com>2018-09-05 14:25:22 +0800
committerGuo Ren <ren_guo@c-sky.com>2018-10-26 00:54:26 +0800
commit735ee005c371b2d8d1dbf0542590d17f1e0a0b2f (patch)
treefb4993c30faf6019610bcd4d51ad1c4a1ab23b6c /arch/csky/abiv1/inc/abi/regdef.h
parent991069865796f8ad31ee54aca8a0f1b7a522e94b (diff)
downloadlinux-sh-735ee005c371b2d8d1dbf0542590d17f1e0a0b2f.tar.gz
csky: Misc headers
This patch adds csky registers' definition, bitops, byteorder, asm-offsets codes. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/csky/abiv1/inc/abi/regdef.h')
-rw-r--r--arch/csky/abiv1/inc/abi/regdef.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/csky/abiv1/inc/abi/regdef.h b/arch/csky/abiv1/inc/abi/regdef.h
new file mode 100644
index 000000000000..876689291b71
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/regdef.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_REGDEF_H
+#define __ASM_CSKY_REGDEF_H
+
+#define syscallid r1
+#define r11_sig r11
+
+#define regs_syscallid(regs) regs->regs[9]
+
+/*
+ * PSR format:
+ * | 31 | 30-24 | 23-16 | 15 14 | 13-0 |
+ * S CPID VEC TM
+ *
+ * S: Super Mode
+ * CPID: Coprocessor id, only 15 for MMU
+ * VEC: Exception Number
+ * TM: Trace Mode
+ */
+#define DEFAULT_PSR_VALUE 0x8f000000
+
+#define SYSTRACE_SAVENUM 2
+
+#endif /* __ASM_CSKY_REGDEF_H */