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authorGuo Ren <ren_guo@c-sky.com>2018-09-05 14:25:22 +0800
committerGuo Ren <ren_guo@c-sky.com>2018-10-26 00:54:26 +0800
commit735ee005c371b2d8d1dbf0542590d17f1e0a0b2f (patch)
treefb4993c30faf6019610bcd4d51ad1c4a1ab23b6c /arch/csky/include/asm/reg_ops.h
parent991069865796f8ad31ee54aca8a0f1b7a522e94b (diff)
downloadlinux-sh-735ee005c371b2d8d1dbf0542590d17f1e0a0b2f.tar.gz
csky: Misc headers
This patch adds csky registers' definition, bitops, byteorder, asm-offsets codes. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/csky/include/asm/reg_ops.h')
-rw-r--r--arch/csky/include/asm/reg_ops.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/csky/include/asm/reg_ops.h b/arch/csky/include/asm/reg_ops.h
new file mode 100644
index 000000000000..cccf7d525fe2
--- /dev/null
+++ b/arch/csky/include/asm/reg_ops.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __ASM_REGS_OPS_H
+#define __ASM_REGS_OPS_H
+
+#define mfcr(reg) \
+({ \
+ unsigned int tmp; \
+ asm volatile( \
+ "mfcr %0, "reg"\n" \
+ : "=r"(tmp) \
+ : \
+ : "memory"); \
+ tmp; \
+})
+
+#define mtcr(reg, val) \
+({ \
+ asm volatile( \
+ "mtcr %0, "reg"\n" \
+ : \
+ : "r"(val) \
+ : "memory"); \
+})
+
+#endif /* __ASM_REGS_OPS_H */