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authorGuo Ren <guoren@linux.alibaba.com>2020-04-14 20:14:12 +0800
committerGuo Ren <guoren@linux.alibaba.com>2020-05-13 17:55:05 +0800
commitc2e59d1f4df8783856a4e6a05a7d4a76d7cf7082 (patch)
treeb4668a9c98af02140494cb7ae5ee84702f3d5c22 /arch/csky
parentbd11aabd35287b6961d197539aa61da5ab8fc0d7 (diff)
downloadlinux-sh-c2e59d1f4df8783856a4e6a05a7d4a76d7cf7082.tar.gz
csky: Fixup perf probe -x hungup
case: # perf probe -x /lib/libc-2.28.9000.so memcpy # perf record -e probe_libc:memcpy -aR sleep 1 System hangup and cpu get in trap_c loop, because our hardware singlestep state could still get interrupt signal. When we get in uprobe_xol singlestep slot, we should disable irq in pt_regs->psr. And is_swbp_insn() need a csky arch implementation with a low 16bit mask. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Cc: Steven Rostedt (VMware) <rostedt@goodmis.org>
Diffstat (limited to 'arch/csky')
-rw-r--r--arch/csky/kernel/probes/uprobes.c5
-rw-r--r--arch/csky/kernel/ptrace.c6
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/csky/kernel/probes/uprobes.c b/arch/csky/kernel/probes/uprobes.c
index b3a56c260e3e..1a9e0961b2b5 100644
--- a/arch/csky/kernel/probes/uprobes.c
+++ b/arch/csky/kernel/probes/uprobes.c
@@ -11,6 +11,11 @@
#define UPROBE_TRAP_NR UINT_MAX
+bool is_swbp_insn(uprobe_opcode_t *insn)
+{
+ return (*insn & 0xffff) == UPROBE_SWBP_INSN;
+}
+
unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
{
return instruction_pointer(regs);
diff --git a/arch/csky/kernel/ptrace.c b/arch/csky/kernel/ptrace.c
index 21ac2608f205..5a82230bddf9 100644
--- a/arch/csky/kernel/ptrace.c
+++ b/arch/csky/kernel/ptrace.c
@@ -41,6 +41,9 @@ static void singlestep_disable(struct task_struct *tsk)
regs = task_pt_regs(tsk);
regs->sr = (regs->sr & TRACE_MODE_MASK) | TRACE_MODE_RUN;
+
+ /* Enable irq */
+ regs->sr |= BIT(6);
}
static void singlestep_enable(struct task_struct *tsk)
@@ -49,6 +52,9 @@ static void singlestep_enable(struct task_struct *tsk)
regs = task_pt_regs(tsk);
regs->sr = (regs->sr & TRACE_MODE_MASK) | TRACE_MODE_SI;
+
+ /* Disable irq */
+ regs->sr &= ~BIT(6);
}
/*