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authorRich Felker <dalias@libc.org>2016-03-17 23:12:12 +0000
committerRich Felker <dalias@libc.org>2016-07-22 17:03:37 +0000
commitd4678a5f511926a4008e1c07476994293c511b0f (patch)
tree5f25a4e59dca9c97222c53e9533e90b604940689 /drivers/irqchip/Kconfig
parent4ef69da7e1d318a1d6780ea8f3681f2291091c25 (diff)
downloadlinux-sh-d4678a5f511926a4008e1c07476994293c511b0f.tar.gz
irqchip: add J-Core AIC driver
There are two versions of the J-Core interrupt controller in use, aic1 which generates interrupts with programmable priorities, but only supports 8 irq lines and maps them to cpu traps in the range 17 to 24, and aic2 which uses traps in the range 64-127 and supports up to 128 irqs, with priorities dependent on the interrupt number. The Linux driver does not make use of priorities anyway. For simplicity, there is no aic1-specific logic in the driver beyond setting the priority register, which is necessary for interrupts to work at all. Eventually aic1 will likely be phased out, but it's currently in use in deployments and all released bitstream binaries. Signed-off-by: Rich Felker <dalias@libc.org>
Diffstat (limited to 'drivers/irqchip/Kconfig')
-rw-r--r--drivers/irqchip/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index fa33c50b0e5a..fe58177a049e 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -150,6 +150,12 @@ config PIC32_EVIC
select GENERIC_IRQ_CHIP
select IRQ_DOMAIN
+config JCORE_AIC
+ bool "J-Core integrated AIC"
+ select IRQ_DOMAIN
+ help
+ Support for the J-Core integrated AIC.
+
config RENESAS_INTC_IRQPIN
bool
select IRQ_DOMAIN