path: root/drivers/oprofile/cpu_buffer.h
diff options
authorRobert Richter <>2008-12-25 17:26:07 +0100
committerRobert Richter <>2009-01-07 22:40:47 +0100
commitae735e9964b4584923f2997d98a8d80ae9c1a75c (patch)
tree0fc72d18bcc5951f9dd519e8a4527593724b816f /drivers/oprofile/cpu_buffer.h
parent2d87b14cf8d0b07720de26d90789d02124141616 (diff)
oprofile: rework implementation of cpu buffer events
Special events such as task or context switches are marked with an escape code in the cpu buffer followed by an event code or a task identifier. There is one escape code per event. To make escape sequences also available for data samples the internal cpu buffer format must be changed. The current implementation does not allow the extension of event codes since this would lead to collisions with the task identifiers. To avoid this, this patch introduces an event mask that allows the storage of multiple events with one escape code. Now, task identifiers are stored in the data section of the sample. The implementation also allows the usage of custom data in a sample. As a side effect the new code is much more readable and easier to understand. Signed-off-by: Robert Richter <>
Diffstat (limited to 'drivers/oprofile/cpu_buffer.h')
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/oprofile/cpu_buffer.h b/drivers/oprofile/cpu_buffer.h
index d7c0545ef8b2..e634dcf2f26f 100644
--- a/drivers/oprofile/cpu_buffer.h
+++ b/drivers/oprofile/cpu_buffer.h
@@ -78,10 +78,12 @@ int op_cpu_buffer_write_commit(struct op_entry *entry);
struct op_sample *op_cpu_buffer_read_entry(struct op_entry *entry, int cpu);
unsigned long op_cpu_buffer_entries(int cpu);
-/* transient events for the CPU buffer -> event buffer */
-#define CPU_IS_KERNEL 1
-#define CPU_TRACE_BEGIN 2
-#define IBS_FETCH_BEGIN 3
-#define IBS_OP_BEGIN 4
+/* extra data flags */
+#define KERNEL_CTX_SWITCH (1UL << 0)
+#define IS_KERNEL (1UL << 1)
+#define TRACE_BEGIN (1UL << 2)
+#define USER_CTX_SWITCH (1UL << 3)
+#define IBS_FETCH_BEGIN (1UL << 4)
+#define IBS_OP_BEGIN (1UL << 5)