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authorBob Moore <robert.moore@intel.com>2012-07-12 09:40:10 +0800
committerLen Brown <len.brown@intel.com>2012-07-17 00:05:51 -0400
commitba494beeaa69bc0fb01eb89464ad5d57d26e3901 (patch)
tree804996ccb531af38f91853bd9b8055b65cd2ac6b /include/acpi/actbl.h
parent75e7386b104b27b1158bf7d13c69d5317f0033ca (diff)
downloadlinux-sh-ba494beeaa69bc0fb01eb89464ad5d57d26e3901.tar.gz
ACPICA: AcpiSrc: Fix some translation issues for Linux conversion
Fixes issues like this: i_aSL -> iASL 00-7_f -> 00-7F local_fADT -> local_FADT execute_oSI -> execute_OSI Also, in function headers, the parameters are now translated to lower case (with underscores if necessary.) Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'include/acpi/actbl.h')
-rw-r--r--include/acpi/actbl.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/acpi/actbl.h b/include/acpi/actbl.h
index a629a01fc812..59a73e1b2845 100644
--- a/include/acpi/actbl.h
+++ b/include/acpi/actbl.h
@@ -212,7 +212,7 @@ struct acpi_table_fadt {
u32 smi_command; /* 32-bit Port address of SMI command port */
u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */
u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
- u8 S4bios_request; /* Value to write to SMI CMD to enter S4BIOS state */
+ u8 s4_bios_request; /* Value to write to SMI CMD to enter S4BIOS state */
u8 pstate_control; /* Processor performance state control */
u32 pm1a_event_block; /* 32-bit Port address of Power Mgt 1a Event Reg Blk */
u32 pm1b_event_block; /* 32-bit Port address of Power Mgt 1b Event Reg Blk */
@@ -230,8 +230,8 @@ struct acpi_table_fadt {
u8 gpe1_block_length; /* Byte Length of ports at gpe1_block */
u8 gpe1_base; /* Offset in GPE number space where GPE1 events start */
u8 cst_control; /* Support for the _CST object and C States change notification */
- u16 C2latency; /* Worst case HW latency to enter/exit C2 state */
- u16 C3latency; /* Worst case HW latency to enter/exit C3 state */
+ u16 c2_latency; /* Worst case HW latency to enter/exit C2 state */
+ u16 c3_latency; /* Worst case HW latency to enter/exit C3 state */
u16 flush_size; /* Processor's memory cache line width, in bytes */
u16 flush_stride; /* Number of flush strides that need to be read */
u8 duty_offset; /* Processor duty cycle index in processor's P_CNT reg */
@@ -291,7 +291,7 @@ struct acpi_table_fadt {
#define ACPI_FADT_S4_RTC_VALID (1<<16) /* 16: [V4] Contents of RTC_STS valid after S4 wake (ACPI 3.0) */
#define ACPI_FADT_REMOTE_POWER_ON (1<<17) /* 17: [V4] System is compatible with remote power on (ACPI 3.0) */
#define ACPI_FADT_APIC_CLUSTER (1<<18) /* 18: [V4] All local APICs must use cluster model (ACPI 3.0) */
-#define ACPI_FADT_APIC_PHYSICAL (1<<19) /* 19: [V4] All local x_aPICs must use physical dest mode (ACPI 3.0) */
+#define ACPI_FADT_APIC_PHYSICAL (1<<19) /* 19: [V4] All local xAPICs must use physical dest mode (ACPI 3.0) */
#define ACPI_FADT_HW_REDUCED (1<<20) /* 20: [V5] ACPI hardware is not implemented (ACPI 5.0) */
#define ACPI_FADT_LOW_POWER_S0 (1<<21) /* 21: [V5] S0 power savings are equal or better than S3 (ACPI 5.0) */