path: root/arch/riscv/kernel
AgeCommit message (Expand)AuthorLines
2020-06-20Merge tag 'riscv-for-linus-5.8-rc2' of git:// Torvalds-0/+6
2020-06-18RISC-V: Don't allow write+exec only page mapping request in mmapYash Shah-0/+6
2020-06-18maccess: rename probe_kernel_address to get_kernel_nofaultChristoph Hellwig-4/+4
2020-06-17maccess: rename probe_kernel_{read,write} to copy_{from,to}_kernel_nofaultChristoph Hellwig-5/+6
2020-06-11Merge tag 'riscv-for-linus-5.8-mw1' of git:// Torvalds-97/+96
2020-06-10riscv: set the permission of vdso_data to read-onlyVincent Chen-2/+14
2020-06-10riscv: use vDSO common flow to reduce the latency of the time-related functionsVincent Chen-59/+51
2020-06-09riscv: fix build warning of missing prototypesZong Li-0/+1
2020-06-09RISC-V: Remove do_IRQ() functionAnup Patel-7/+3
2020-06-09irqchip: RISC-V per-HART local interrupt controller driverAnup Patel-32/+3
2020-06-09RISC-V: Rename and move plic_find_hart_id() to arch directoryAnup Patel-0/+16
2020-06-09RISC-V: self-contained IPI handling routineAnup Patel-8/+19
2020-06-09mmap locking API: use coccinelle to convert mmap_sem rwsem call sitesMichel Lespinasse-2/+2
2020-06-09mm: introduce include/linux/pgtable.hMike Rapoport-2/+2
2020-06-09mm: don't include asm/pgtable.h if linux/mm.h is already includedMike Rapoport-1/+0
2020-06-09kernel: rename show_stack_loglvl() => show_stack()Dmitry Safonov-7/+1
2020-06-09riscv: add show_stack_loglvl()Dmitry Safonov-3/+10
2020-06-09kallsyms/printk: add loglvl to print_ip_sym()Dmitry Safonov-1/+1
2020-06-04Merge tag 'riscv-for-linus-5.8-mw0' of git:// Torvalds-21/+500
2020-05-21RISC-V: gp_in_global needs register keywordPalmer Dabbelt-1/+1
2020-05-20riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structureYash Shah-0/+17
2020-05-18riscv: Use text_mutex instead of patch_lockZong Li-6/+20
2020-05-18riscv: Use NOKPROBE_SYMBOL() instead of __krpobes annotationZong Li-7/+14
2020-05-18riscv: Remove the 'riscv_' prefix of function nameZong Li-12/+12
2020-05-18riscv: Add SW single-step support for KDBVincent Chen-2/+177
2020-05-18riscv: Use the XML target descriptions to report 3 system registersVincent Chen-0/+15
2020-05-18riscv: Add KGDB supportVincent Chen-0/+206
2020-05-18RISC-V: Skip setting up PMPs on trapsPalmer Dabbelt-1/+10
2020-05-18riscv: Allow device trees to be built into the kernelPalmer Dabbelt-0/+36
2020-05-12riscv: stacktrace: Fix undefined reference to `walk_stackframe'Kefeng Wang-1/+1
2020-05-12riscv: perf: RISCV_BASE_PMU should be independentKefeng Wang-1/+1
2020-05-11riscv: perf_event: Make some funciton staticKefeng Wang-4/+4
2020-05-04riscv: force __cpu_up_ variables to put in data sectionZong Li-2/+2
2020-05-04riscv: add Linux note to vdsoAndreas Schwab-1/+13
2020-05-04RISC-V: Add bitmap reprensenting ISA features common across CPUsAnup Patel-3/+80
2020-05-04RISC-V: Export riscv_cpuid_to_hartid_mask() APIAnup Patel-0/+2
2020-04-21riscv: sbi: Fix undefined reference to sbi_shutdownKefeng Wang-5/+8
2020-04-21riscv: sbi: Correct sbi_shutdown() and sbi_clear_ipi() exportKefeng Wang-2/+2
2020-04-21riscv: fix vdso build with lldIlie Halip-3/+3
2020-04-21RISC-V: stacktrace: Declare sp_in_global outside ifdefGuenter Roeck-2/+2
2020-04-09Merge tag 'riscv-for-linus-5.7' of git:// Torvalds-206/+1679
2020-04-03Merge tag 'spdx-5.7-rc1' of git:// Torvalds-0/+2
2020-04-03riscv: Add SOC early init supportDamien Le Moal-0/+36
2020-04-03riscv: Unaligned load/store handling for M_MODEDamien Le Moal-4/+395
2020-03-31RISC-V: Support cpu hotplugAtish Patra-1/+140
2020-03-31RISC-V: Add supported for ordered booting method using HSMAtish Patra-3/+121
2020-03-31RISC-V: Export SBI error to linux error mapping functionAtish Patra-1/+2
2020-03-31RISC-V: Add cpu_ops and modify default booting methodAtish Patra-21/+113
2020-03-31RISC-V: Move relocate and few other functions out of __initAtish Patra-72/+86
2020-03-31RISC-V: Implement new SBI v0.2 extensionsAtish Patra-4/+249