summaryrefslogtreecommitdiff
path: root/drivers/pinctrl/intel/pinctrl-sunrisepoint.c
AgeCommit message (Collapse)AuthorLines
2020-04-13pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-HAndy Shevchenko-7/+8
It appears that SPT-H variant has different offset for PAD locking registers. Fix it here. Fixes: 551fa5801ef1 ("pinctrl: intel: sunrisepoint: Add Intel Sunrisepoint-H support") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-01-16pinctrl: sunrisepoint: Add Coffee Lake-S ACPI IDMika Westerberg-0/+1
Intel Coffee Lake-S PCH has the same GPIO hardware than Sunrisepoint-H PCH but the ACPI ID is different. Add this new ACPI ID to the list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-01-08pinctrl: sunrisepoint: Add missing Interrupt Status register offsetBoyan Ding-0/+1
Commit 179e5a6114cc ("pinctrl: intel: Remove default Interrupt Status offset") removes default interrupt status offset of GPIO controllers, with previous commits explicitly providing the previously default offsets. However, the is_offset value in SPTH_COMMUNITY is missing, preventing related irq from being properly detected and handled. Fixes: f702e0b93cdb ("pinctrl: sunrisepoint: Provide Interrupt Status register offset") Link: https://bugzilla.kernel.org/show_bug.cgi?id=205745 Cc: stable@vger.kernel.org Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-08-07pinctrl: sunrisepoint: Provide Interrupt Status register offsetAndy Shevchenko-0/+2
Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2018-11-08pinctrl: sunrisepoint: Get rid of unneeded ->probe() stubAndy Shevchenko-6/+1
The local ->probe() stub does nothing except calling a generic Intel pin control probe function. Thus, it's not needed and generic function may be called directly. Convert the driver accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2018-09-18pinctrl: intel: Move linux/pm.h to the local headerAndy Shevchenko-1/+0
We now using a common macro for PM operations in pin control drivers for Intel SoCs, and since that macro relies on the definition and macro from linux/pm.h header file, it's logical to include it directly in pinctrl-intel.h. Otherwise it's a bit fragile and requires a proper ordering of header inclusion in C files. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-31pinctrl: sunrisepoint: Define PM ops via INTEL_PINCTRL_PM_OPS()Andy Shevchenko-4/+1
Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-31pinctrl: sunrisepoint: Convert to use intel_pinctrl_probe_by_hid()Andy Shevchenko-10/+3
Get rid of code duplication by converting to use intel_pinctrl_probe_by_hid(). No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-07-02pinctrl: intel: Convert to use SPDX identifierAndy Shevchenko-4/+1
Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-02pinctrl: sunrisepoint: Align GPIO number space with WindowsMika Westerberg-3/+42
It turns out that the Windows GPIO driver for Sunrisepoint PCH-H uses similar bank structure than it does for Cannon Lake with the exception that here the bank size is always 24 pins. Starting from pad group E the BIOS/Windows GPIO numbering does not match the hardware anymore but instead there are gaps to make each pad group ("bank") consume exactly 24 pins. Because of this Linux does not use correct pins for GpioIo/GpioIo resources exposed by the BIOS. This patch aligns the GPIO number space with BIOS/Windows to make sure the same numbering scheme is used in Linux as well following what we did already for Intel Cannon Lake. Link: https://bugzilla.redhat.com/show_bug.cgi?id=1543769 Reported-by: Vivien FRASCA <vivien.frasca@gmail.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-09pinctrl: intel: Add support for variable size pad groupsMika Westerberg-0/+1
The Intel GPIO hardware has a concept of pad groups, which means 1 to 32 pads occupying their own GPI_IS, GPI_IE, PAD_OWN and so on registers. The existing hardware has the same amount of pads in each pad group (except the last one) so it is possible to use community->gpp_size to calculate start offset of each register. With the next generation SoCs the pad group size is not always the same anymore which means we cannot use community->gpp_size for register offset calculations directly. To support variable size pad groups we introduce struct intel_padgroup that can be filled in by the client drivers according the hardware pad group layout. The core driver will always use these when it performs calculations for pad register offsets. The core driver will automatically populate pad groups based on community->gpp_size if the driver does not provide any. This makes sure the existing drivers still work as expected. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Chuah, Kim Tatt <kim.tatt.chuah@intel.com> Signed-off-by: Tan Jui Nee <jui.nee.tan@intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-11pinctrl: intel: Convert to use devm_gpiochip_add_data()Mika Westerberg-1/+0
This simplifies error handling and allows us to drop intel_pinctrl_remove() completely. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10pinctrl: intel: fix bug of register offset calculationQipeng Zha-0/+1
The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS, GPI_IE, are not 24 for Broxton, Add a parameter to allow different platform to set correct value. Signed-off-by: Qi Zheng <qi.zheng@intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-12pinctrl: intel: sunrisepoint: Add Intel Sunrisepoint-H supportMika Westerberg-0/+263
Intel Sunrisepoint-H is a desktop version of the PCH (Platform Controller Hub). It has slightly different pin configuration compared to the LP version. This patch adds support for Sunrisepoint-H to the existing pinctrl-sunrisepoint.c driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-07pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO supportMika Westerberg-0/+336
This driver supports pinctrl/GPIO hardware found on Intel Sunrisepoint (a Skylake PCH) providing users a pinctrl and GPIO interfaces (including GPIO interrupts). The driver is split into core and platform parts so that the same core driver can be reused in other drivers for other Intel GPIO hardware that is based on the same host controller design. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>