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authorRich Felker <dalias@aerifal.cx>2016-01-21 19:08:54 +0000
committerRich Felker <dalias@aerifal.cx>2016-01-21 19:08:54 +0000
commit1315596b510189b5159e742110b504177bdd4932 (patch)
tree27159b7b95b944671454b11f36ee13308241f4b5 /arch/aarch64
parentce3e24eaae91e7a90f87eb7f1edea8df5942de11 (diff)
downloadmusl-1315596b510189b5159e742110b504177bdd4932.tar.gz
refactor internal atomic.h
rather than having each arch provide its own atomic.h, there is a new shared atomic.h in src/internal which pulls arch-specific definitions from arc/$(ARCH)/atomic_arch.h. the latter can be extremely minimal, defining only a_cas or new ll/sc type primitives which the shared atomic.h will use to construct everything else. this commit avoids making heavy changes to the individual archs' atomic implementations. definitions which are identical or near-identical to what the new shared atomic.h would produce have been removed, but otherwise the changes made are just hooking up the arch-specific files to the new infrastructure. major changes to take advantage of the new system will come in subsequent commits.
Diffstat (limited to 'arch/aarch64')
-rw-r--r--arch/aarch64/atomic_arch.h (renamed from arch/aarch64/atomic.h)32
1 files changed, 14 insertions, 18 deletions
diff --git a/arch/aarch64/atomic.h b/arch/aarch64/atomic_arch.h
index e7c82c2e..0755534f 100644
--- a/arch/aarch64/atomic.h
+++ b/arch/aarch64/atomic_arch.h
@@ -1,8 +1,4 @@
-#ifndef _INTERNAL_ATOMIC_H
-#define _INTERNAL_ATOMIC_H
-
-#include <stdint.h>
-
+#define a_ctz_64 a_ctz_64
static inline int a_ctz_64(uint64_t x)
{
__asm__(
@@ -12,16 +8,13 @@ static inline int a_ctz_64(uint64_t x)
return x;
}
-static inline int a_ctz_l(unsigned long x)
-{
- return a_ctz_64(x);
-}
-
+#define a_barrier a_barrier
static inline void a_barrier()
{
__asm__ __volatile__("dmb ish");
}
+#define a_cas_p a_cas_p
static inline void *a_cas_p(volatile void *p, void *t, void *s)
{
void *old;
@@ -40,6 +33,7 @@ static inline void *a_cas_p(volatile void *p, void *t, void *s)
return old;
}
+#define a_cas a_cas
static inline int a_cas(volatile int *p, int t, int s)
{
int old;
@@ -58,6 +52,7 @@ static inline int a_cas(volatile int *p, int t, int s)
return old;
}
+#define a_swap a_swap
static inline int a_swap(volatile int *x, int v)
{
int old, tmp;
@@ -73,6 +68,7 @@ static inline int a_swap(volatile int *x, int v)
return old;
}
+#define a_fetch_add a_fetch_add
static inline int a_fetch_add(volatile int *x, int v)
{
int old, tmp;
@@ -89,6 +85,7 @@ static inline int a_fetch_add(volatile int *x, int v)
return old-v;
}
+#define a_inc a_inc
static inline void a_inc(volatile int *x)
{
int tmp, tmp2;
@@ -104,6 +101,7 @@ static inline void a_inc(volatile int *x)
: "memory", "cc" );
}
+#define a_dec a_dec
static inline void a_dec(volatile int *x)
{
int tmp, tmp2;
@@ -119,6 +117,7 @@ static inline void a_dec(volatile int *x)
: "memory", "cc" );
}
+#define a_and_64 a_and_64
static inline void a_and_64(volatile uint64_t *p, uint64_t v)
{
int tmp, tmp2;
@@ -134,6 +133,7 @@ static inline void a_and_64(volatile uint64_t *p, uint64_t v)
: "memory", "cc" );
}
+#define a_and a_and
static inline void a_and(volatile int *p, int v)
{
int tmp, tmp2;
@@ -149,6 +149,7 @@ static inline void a_and(volatile int *p, int v)
: "memory", "cc" );
}
+#define a_or_64 a_or_64
static inline void a_or_64(volatile uint64_t *p, uint64_t v)
{
int tmp, tmp2;
@@ -164,11 +165,13 @@ static inline void a_or_64(volatile uint64_t *p, uint64_t v)
: "memory", "cc" );
}
+#define a_or_l a_or_l
static inline void a_or_l(volatile void *p, long v)
{
return a_or_64(p, v);
}
+#define a_or a_or
static inline void a_or(volatile int *p, int v)
{
int tmp, tmp2;
@@ -184,6 +187,7 @@ static inline void a_or(volatile int *p, int v)
: "memory", "cc" );
}
+#define a_store a_store
static inline void a_store(volatile int *p, int x)
{
__asm__ __volatile__(
@@ -196,11 +200,3 @@ static inline void a_store(volatile int *p, int x)
}
#define a_spin a_barrier
-
-static inline void a_crash()
-{
- *(volatile char *)0=0;
-}
-
-
-#endif