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authorSzabolcs Nagy <nsz@port70.net>2016-10-09 20:42:02 +0200
committerRich Felker <dalias@aerifal.cx>2016-10-20 01:28:25 -0400
commitfe39aaae0eafdab3340ea9a4c4b275c3528b4d75 (patch)
tree2055dff0982e4ab83e1615c1c8cb50ca1e3e10f7 /arch/aarch64
parent5a05f67599ff06f9255aa4119cfecb85575d6e20 (diff)
downloadmusl-fe39aaae0eafdab3340ea9a4c4b275c3528b4d75.tar.gz
add bits/hwcap.h and include it in sys/auxv.h
aarch64, arm, mips, mips64, mipsn32, powerpc, powerpc64 and sh have cpu feature bits defined in linux for AT_HWCAP auxv entry, so expose those in sys/auxv.h it seems the mips hwcaps were never exposed to userspace neither by linux nor by glibc, but that's most likely an oversight.
Diffstat (limited to 'arch/aarch64')
-rw-r--r--arch/aarch64/bits/hwcap.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/aarch64/bits/hwcap.h b/arch/aarch64/bits/hwcap.h
new file mode 100644
index 00000000..2b923f71
--- /dev/null
+++ b/arch/aarch64/bits/hwcap.h
@@ -0,0 +1,11 @@
+#define HWCAP_FP (1 << 0)
+#define HWCAP_ASIMD (1 << 1)
+#define HWCAP_EVTSTRM (1 << 2)
+#define HWCAP_AES (1 << 3)
+#define HWCAP_PMULL (1 << 4)
+#define HWCAP_SHA1 (1 << 5)
+#define HWCAP_SHA2 (1 << 6)
+#define HWCAP_CRC32 (1 << 7)
+#define HWCAP_ATOMICS (1 << 8)
+#define HWCAP_FPHP (1 << 9)
+#define HWCAP_ASIMDHP (1 << 10)