path: root/arch/mips/pthread_arch.h
diff options
authorRich Felker <>2012-10-15 18:51:53 -0400
committerRich Felker <>2012-10-15 18:51:53 -0400
commit9ec4283b28cf676292fd5c6f681bef1e90e30c18 (patch)
tree2897be56744c39158a3e53adfc4e3569b3f8547d /arch/mips/pthread_arch.h
parentd5304147b983f309ed0c9050e3b8b6f2c9f87f43 (diff)
add support for TLS variant I, presently needed for arm and mips
despite documentation that makes it sound a lot different, the only ABI-constraint difference between TLS variants II and I seems to be that variant II stores the initial TLS segment immediately below the thread pointer (i.e. the thread pointer points to the end of it) and variant I stores the initial TLS segment above the thread pointer, requiring the thread descriptor to be stored below. the actual value stored in the thread pointer register also tends to have per-arch random offsets applied to it for silly micro-optimization purposes. with these changes applied, TLS should be basically working on all supported archs except microblaze. I'm still working on getting the necessary information and a working toolchain that can build TLS binaries for microblaze, but in theory, static-linked programs with TLS and dynamic-linked programs where only the main executable uses TLS should already work on microblaze. alignment constraints have not yet been heavily tested, so it's possible that this code does not always align TLS segments correctly on archs that need TLS variant I.
Diffstat (limited to 'arch/mips/pthread_arch.h')
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/mips/pthread_arch.h b/arch/mips/pthread_arch.h
index 77b7330d..f8e35ae4 100644
--- a/arch/mips/pthread_arch.h
+++ b/arch/mips/pthread_arch.h
@@ -1,12 +1,16 @@
static inline struct pthread *__pthread_self()
- struct pthread *self;
#ifdef __clang__
- __asm__ __volatile__ (".word 0x7c03e83b ; move %0, $3" : "=r" (self) : : "$3" );
+ char *tp;
+ __asm__ __volatile__ (".word 0x7c03e83b ; move %0, $3" : "=r" (tp) : : "$3" );
- __asm__ __volatile__ (".word 0x7c03e83b" : "=v" (self) );
+ register char *tp __asm__("$3");
+ __asm__ __volatile__ (".word 0x7c03e83b" : "=r" (tp) );
- return self;
+ return (pthread_t)(tp - 0x7000 - sizeof(struct pthread));
+#define TLS_ABOVE_TP
+#define TP_ADJ(p) ((char *)(p) + sizeof(struct pthread) + 0x7000)
#define CANCEL_REG_IP (3-(union {int __i; char __b;}){1}.__b)