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authorRich Felker <dalias@aerifal.cx>2020-08-24 22:04:52 -0400
committerRich Felker <dalias@aerifal.cx>2020-08-24 22:04:52 -0400
commitea71a9004e08030a15d45186e263fd2b0c51cc25 (patch)
tree9bbe576df4289c730b60407178c2d786f325b224 /arch/riscv64/pthread_arch.h
parent19f8642494b7d27b2ceed5c14d4a0b27cb749afe (diff)
downloadmusl-ea71a9004e08030a15d45186e263fd2b0c51cc25.tar.gz
deduplicate TP_ADJ logic out of each arch, replace with TP_OFFSET
the only part of TP_ADJ that was not uniquely determined by TLS_ABOVE_TP was the 0x7000 adjustment used mainly on mips and powerpc variants.
Diffstat (limited to 'arch/riscv64/pthread_arch.h')
-rw-r--r--arch/riscv64/pthread_arch.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/riscv64/pthread_arch.h b/arch/riscv64/pthread_arch.h
index db414b17..50f0868d 100644
--- a/arch/riscv64/pthread_arch.h
+++ b/arch/riscv64/pthread_arch.h
@@ -7,7 +7,6 @@ static inline struct pthread *__pthread_self()
#define TLS_ABOVE_TP
#define GAP_ABOVE_TP 0
-#define TP_ADJ(p) ((char *)p + sizeof(struct pthread))
#define DTP_OFFSET 0x800