|author||Rich Felker <firstname.lastname@example.org>||2013-08-28 03:34:57 -0400|
|committer||Rich Felker <email@example.com>||2013-08-28 03:34:57 -0400|
optimized C memcpy
unlike the old C memcpy, this version handles word-at-a-time reads and writes even for misaligned copies. it does not require that the cpu support misaligned accesses; instead, it performs bit shifts to realign the bytes for the destination. essentially, this is the C version of the ARM assembly language memcpy. the ideas are all the same, and it should perform well on any arch with a decent number of general-purpose registers that has a barrel shift operation. since the barrel shifter is an optional cpu feature on microblaze, it may be desirable to provide an alternate asm implementation on microblaze, but otherwise the C code provides a competitive implementation for "generic risc-y" cpu archs that should alleviate the urgent need for arch-specific memcpy asm.
Diffstat (limited to 'configure')
0 files changed, 0 insertions, 0 deletions