path: root/src/setjmp/arm/setjmp.s
diff options
authorRich Felker <>2015-11-09 21:14:07 -0500
committerRich Felker <>2015-11-09 21:14:07 -0500
commitcf40375e8fd14fc02a850af90b145d324d0381b5 (patch)
treebb37e26c9b2ca9b2b969cad83303424de3507ef6 /src/setjmp/arm/setjmp.s
parentea1e2c5e18dd0790fb9b2af2bd947f4981736dc2 (diff)
use vfp mnemonics rather than hard-coded opcodes in arm setjmp/longjmp
the code to save/restore vfp registers needs to build even when the configured target does not have fpu; this is because code using vfp fpu (but with the standard soft-float EABI) may call a libc built for a soft-float only, and the EABI considers these registers call-saved when they exist. thus, extra directives are used to force the assembler to allow vfp instructions and to avoid marking the resulting object files as requiring vfp. moving away from using hard-coded opcode words is necessary in order to eventually support producing thumb2-only output for cortex-m. conditional execution of these instructions based on hwcap flags was already implemented. when building for arm (non-thumb) output, the only currently-supported configuration, this commit does not change the code emitted.
Diffstat (limited to 'src/setjmp/arm/setjmp.s')
1 files changed, 5 insertions, 1 deletions
diff --git a/src/setjmp/arm/setjmp.s b/src/setjmp/arm/setjmp.s
index 19f8abc0..32db7d87 100644
--- a/src/setjmp/arm/setjmp.s
+++ b/src/setjmp/arm/setjmp.s
@@ -22,7 +22,11 @@ setjmp:
stc p2, cr4, [ip], #48
2: tst r1,#0x40
beq 2f
- .word 0xecac8b10 /* vstmia ip!, {d8-d15} */
+ .fpu vfp
+ vstmia ip!, {d8-d15}
+ .fpu softvfp
+ .eabi_attribute 10, 0
+ .eabi_attribute 27, 0
2: tst r1,#0x200
beq 3f
stcl p1, cr10, [ip], #8