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2016-03-06add powerpc soft-float supportFelix Fietkau-18/+27
Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different instruction set for floating point operations (SPE). Executing regular PowerPC floating point instructions results in "Illegal instruction" errors. Make it possible to run these devices in soft-float mode.
2013-08-27fix invalid instruction mnemonics in powerpc fenv asmRich Felker-3/+3
there is no non-dot version of the andis instruction, but there's no harm in updating the flags anyway, so just use the dot version.
2013-08-18fix fenv exception functions to mask their argumentSzabolcs Nagy-3/+6
fesetround.c is a wrapper to do the arch independent argument check (on archs where rounding mode is not stored in 2 bits __fesetround still has to check its arguments) on powerpc fe*except functions do not accept the extra invalid flags of its fpscr register the useless FENV_ACCESS pragma was removed from feupdateenv
2012-11-18fenv support for ppc, untestedRich Felker-0/+120
based on code sent to the mailing list by nsz, with minor changes.