From f81e44a0d96c88e052e51982f9fdd6fe0a212b46 Mon Sep 17 00:00:00 2001 From: Rich Felker Date: Thu, 14 Jun 2018 14:26:30 -0400 Subject: add m68k port three ABIs are supported: the default with 68881 80-bit fpu format and results returned in floating point registers, softfloat-only with the same format, and coldfire fpu with IEEE single/double only. only the first is tested at all, and only under qemu which has fpu emulation bugs. basic functionality smoke tests have been performed for the most common arch-specific breakage via libc-test and qemu user-level emulation. some sysvipc failures remain, but are shared with other big endian archs and will be fixed separately. --- src/thread/m68k/clone.s | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 src/thread/m68k/clone.s (limited to 'src/thread/m68k/clone.s') diff --git a/src/thread/m68k/clone.s b/src/thread/m68k/clone.s new file mode 100644 index 00000000..5b61b6fa --- /dev/null +++ b/src/thread/m68k/clone.s @@ -0,0 +1,24 @@ +.text +.global __clone +.type __clone,@function +__clone: + movem.l %d2-%d5,-(%sp) + move.l #120,%d0 + move.l 28(%sp),%d1 + move.l 24(%sp),%d2 + and.l #-16,%d2 + move.l 36(%sp),%d3 + move.l 44(%sp),%d4 + move.l 40(%sp),%d5 + move.l 20(%sp),%a0 + move.l 32(%sp),%a1 + trap #0 + tst.l %d0 + beq 1f + movem.l (%sp)+,%d2-%d5 + rts +1: move.l %a1,-(%sp) + jsr (%a0) + move.l #1,%d0 + trap #0 + clr.b 0 -- cgit v1.2.1