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authorRich Felker <dalias@aerifal.cx>2015-09-17 07:20:51 +0000
committerRich Felker <dalias@aerifal.cx>2015-09-17 07:20:51 +0000
commit4761e63bc4d1ae2e3298fcee1fddced94281d9e7 (patch)
tree8296fe0f09604a842caaf100c430e8db7a36cb2d /arch
parentcd7159e7be73451befedce2e9dfd9f6a4c3b21f0 (diff)
downloadmusl-4761e63bc4d1ae2e3298fcee1fddced94281d9e7.tar.gz
new dlstart stage-2 chaining for or1k
Diffstat (limited to 'arch')
-rw-r--r--arch/or1k/reloc.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/or1k/reloc.h b/arch/or1k/reloc.h
index ddee45c5..128089ca 100644
--- a/arch/or1k/reloc.h
+++ b/arch/or1k/reloc.h
@@ -13,3 +13,12 @@
#define CRTJMP(pc,sp) __asm__ __volatile__( \
"l.jr %0 ; l.ori r1,%1,0" : : "r"(pc), "r"(sp) : "memory" )
+
+#define GETFUNCSYM(fp, sym, got) __asm__ ( \
+ ".hidden " #sym " \n" \
+ " l.jal 1f \n" \
+ " l.nop \n" \
+ " .word " #sym "-. \n" \
+ "1: l.lwz %0, 0(r9) \n" \
+ " l.add %0, %0, r9 \n" \
+ : "=r"(*(fp)) : : "memory", "r9" )