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authorRich Felker <dalias@aerifal.cx>2015-11-09 22:36:38 -0500
committerRich Felker <dalias@aerifal.cx>2015-11-09 22:36:38 -0500
commit9f290a49bf9ee247d540d3c83875288a7991699c (patch)
treed9904f2b9698083ae64c122849a3dc3279f5856a /src/thread
parentcf40375e8fd14fc02a850af90b145d324d0381b5 (diff)
downloadmusl-9f290a49bf9ee247d540d3c83875288a7991699c.tar.gz
remove non-working pre-armv4t support from arm asm
the idea of the three-instruction sequence being removed was to be able to return to thumb code when used on armv4t+ from a thumb caller, but also to be able to run on armv4 without the bx instruction available (in which case the low bit of lr would always be 0). however, without compiler support for generating such a sequence from C code, which does not exist and which there is unlikely to be interest in implementing, there is little point in having it in the asm, and it would likely be easier to add pre-armv4t support via enhanced linker handling of R_ARM_V4BX than at the compiler level. removing this code simplifies adding support for building libc in thumb2-only form (for cortex-m).
Diffstat (limited to 'src/thread')
-rw-r--r--src/thread/arm/clone.s2
-rw-r--r--src/thread/arm/syscall_cp.s2
2 files changed, 0 insertions, 4 deletions
diff --git a/src/thread/arm/clone.s b/src/thread/arm/clone.s
index d146999b..b7fb788b 100644
--- a/src/thread/arm/clone.s
+++ b/src/thread/arm/clone.s
@@ -15,8 +15,6 @@ __clone:
tst r0,r0
beq 1f
ldmfd sp!,{r4,r5,r6,r7}
- tst lr,#1
- moveq pc,lr
bx lr
1: mov r0,r6
diff --git a/src/thread/arm/syscall_cp.s b/src/thread/arm/syscall_cp.s
index 96ce6135..64528b39 100644
--- a/src/thread/arm/syscall_cp.s
+++ b/src/thread/arm/syscall_cp.s
@@ -22,8 +22,6 @@ __cp_begin:
svc 0
__cp_end:
ldmfd sp!,{r4,r5,r6,r7,lr}
- tst lr,#1
- moveq pc,lr
bx lr
__cp_cancel:
ldmfd sp!,{r4,r5,r6,r7,lr}